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<p style="margin-top:0;margin-bottom:0"><span>Dear TRNSYS users,</span></p>
<p style="margin-top:0;margin-bottom:0"><span> I am having a problem with PID controllers performance . I tried modifying the components order however I still get the same warnings on all PID controllers units used in the project. The
<span>TRNSYS Message 315 </span>is as follows,</span></p>
<p style="margin-top:0;margin-bottom:0"><span><br>
</span></p>
<p style="margin-top:0;margin-bottom:0"><span><span>"The TRNSYS processor has reported a potential problem with the connections in your input file. In version 16, there is a very specific calling order after convergence has been reached at each timestep. One
of your connections flows against this calling order - for example you may have the output of an integrator connected as an input to a standard component (one that is being called iteratively at each timestep). While this is not technically an ERROR - it may
cause incorrect values to be passed to the component. For example, the input to an iterating component from an integrator will be from the previously converged timestep and not the current timestep. Refer to the TRNSYS Manual - Volume 1 - for more information
on the calling order for TRNSYS components"</span><br>
</span></p>
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</span></span></p>
<p style="margin-top:0;margin-bottom:0"><span><span>Is there a way to solve this issue? </span></span></p>
<p style="margin-top:0;margin-bottom:0"><span><span><br>
</span></span></p>
<p style="margin-top:0;margin-bottom:0"><span><span>Thank you.</span></span></p>
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